LT1939
3
1939f
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
SS Sink Current
V
FB
= 0V, V
SS
= 2V
300 600 900 糀
SS POR Sink Current (Note 4)
V
FB
= 0V, V
SS
= 2V, Cycle SHDN
400 600 800 糀
SS POR Threshold
V
FB
= 0V
50 100 150 mV
SS to FB Offset (V
SS
V
FB
)
V
VC
= 1V, V
SS
= 0.4V
70 100 120 mV
PG/PG Leakage
V
FB
= 0.9V/0.7V, V
PG
/V
PG
= 25V
0.1 1
糀
PG/ PG Threshold
V
PG
= 0.4V
0.685 0.708 0.730 V
PG/ PG Hysteresis
V
PG
= 0.4V
20 30 40 mV
PG Sink Current
V
PG
= 0.4V, V
FB
= 0.7V
250 500 750 糀
PG Sink Current
V
PG
= 0.4V, V
FB
= 0.9V
500 800 1100 糀
R
T
/SYNC Reference Voltage
V
FB1/2
= 0.9V, R
RT/SYNC
= 15k
0.75 0.850 0.975 V
Switching Frequency
R
RT/SYNC
= 90.9k
R
RT/SYNC
= 90.9k
R
RT/SYNC
= 15k
l
450
425
2
500
500
2.4
550
625
2.8
kHz
kHz
MHz
SYNC Frequency Range
l
250
2500 kHz
Minimum Switch On Time
V
FB
= 0.7V, R
RT/SYNC
= 90.9k
140
ns
Minimum Switch Off Time
V
FB
= 0.7V, R
RT/SYNC
= 90.9k
120
ns
Switch Leakage Current
V
SW
= 0V
1 10
糀
Switch Saturation Voltage
I
SW
= 2A, V
BST
= 18V, V
FB
= 0.7V
450
mV
Switch Peak Current
V
BST
= 18V, V
FB
= 0.7V
l
2.3
2.1
2.8
2.8
3.5
3.5
A
A
Boost Current
I
SW
= 2A, V
BST
= 18V, V
FB
= 0.7V
20 30 45 mA
Minimum Boost Voltage (Note 5)
I
SW
= 2A, V
FB
= 0.7V
2.2 3
V
LFB Voltage
V
LDRV
= 1.2V
l 0.784 0.8 0.816 V
LFB Line/Load Regulation
V
VIN
= 3V to 25V, V
LDRV
= 8V
l
0.776 0.8 0.824 V
SS to LFB Offset (V
SS
V
LFB
)
V
VC
= 1V, V
SS
= 0.8V, V
LDRV
= V
LFB
90 115 140 mV
LFB Bias Current
V
LFB
= 0.8V, V
VC
= 1V
115 300 nA
LDRV Dropout
V
LDRV
= 3V, I
LDRV
= 5mA
l 0.8 1.2 1.6
V
LDRV Maximum Current
V
LDRV
= 0V
l
9 13 18 mA
ELECTRICAL CHARACTERISTICS
The l denotes the speci cations which apply over the full operating
temperature range, otherwise speci cations are at T
J
= 25癈. V
VIN
= 15V, V
RT/SYNC
= 2V, unless otherwise speci ed.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note2: The LT1939EDD is guaranteed to meet performance speci cations
from 0癈 to 125癈 junction temperature. Speci cations over the 40癈
to 125癈 operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT1939IDD is guaranteed over the full 40癈 to 125癈 operating junction
temperature range.
Note 3: Minimum input voltage is de ned as the voltage where internal
bias lines are regulated so that the reference voltage and oscillator remain
constant. Actual minimum input voltage to maintain a regulated output
will depend upon output voltage and load current. See Applications
Information.
Note 4: An internal power-on reset (POR) latch is set on the positive
transition of the SHDN pin through its threshold. The output of the latch
activates a current source on the SS pin which typically sinks 600糀,
discharging the SS capacitor. The latch is reset when the SS pin is driven
below the soft-start POR threshold or the SHDN pin is taken below its
threshold.
Note 5: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the speci ed maximum operating junction temperature may impair device
reliability.
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